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Profile
Tosiron Adegbija
Member of the Graduate Faculty | Associate Professor, Electrical and Computer Engineering
Electrical and Computer Engr
Full Page
Overview
Research
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Collaboration
(10)
Janet Roveda
Mutual work: 1 Proposal
Collaboration Details
Ali Akoglu
Mutual work: 1 Proposal﹒3 Publications
Collaboration Details
Weigang Wang
Mutual work: 2 Proposals﹒1 Grant
Collaboration Details
Ravi Tandon
Mutual work: 1 Publication﹒2 Proposals
Collaboration Details
Shufeng Zhang
Mutual work: 1 Grant﹒2 Proposals
Collaboration Details
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Grants
(4)
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Publications
(46)
Recent
DIALECT: A Methodology for Generating Domain-Specific Accelerators for Edge Computing
2021
accelerator design,
edge computing,
domain-specific accelerators,
methodology,
dialect
Energy characterization of graph workloads
2021
energy,
graph workloads,
characterization,
performance,
computing systems
ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture
2020
biometrics,
authentication,
signal processing,
hardware design,
biomedical engineering
Exploring Domain-Specific Architectures for Energy-Efficient Wearable Computing
2020
wearable computing,
energy efficiency,
domain-specific architectures,
exploring,
embedded systems
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches
2020
cache optimization,
memory systems,
adaptive prefetching,
stt-ram technology,
runtime efficiency
Biomimetic Middleware Design Principles for IoT Infrastructures
2020
iot,
biomimetic,
middleware,
design principles,
infrastructures
Right-Provisioned IoT Edge Computing: An Overview
2019
iot,
edge computing,
provisioning,
overview,
right-provisioned
CONDENSE: A Moving Target Defense Approach for Mitigating Cache Side Channel Attacks
2019
cybersecurity,
cache,
defense,
security,
attack
SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning
2019
cache retention,
stt-ram,
machine learning,
cache prediction,
memory technology
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design
2019
energy-efficient computing,
cache design,
stt-ram technology,
runtime adaptation,
l1 cache